1. Field of the Invention
The present invention relates to a semiconductor device having a shallow trench isolation (STI) structure employed for isolation between elements in a memory cell region and a method of fabricating the same.
2. Description of the Related Art
In semiconductor devices constituting integrated circuits, refinement has progressed for the purpose of improving integration. The refinement includes reduction in an element isolation region as one of elements thereof. A shallow trench isolation (STI) technique has recently been introduced and realized element isolation by the employment of trenches with smaller widths. However, when an insulating film is insufficiently buried in a trench formed in a semiconductor substrate, an insulation property of the substrate would be adversely affected.
In view of the aforesaid problem, use of a coating type oxide film has conventionally been proposed as by JP-A-2006-196843. The coating type oxide film includes solutions such as a solution of silazane perhydride polymer. The solution is spin-coated and thermally treated so as to be buried as an oxide film in a trench.
Element isolation regions are formed in both memory cell regions and peripheral circuit regions by an STI process in nonvolatile semiconductor devices respectively. In this case, after formation of the trench, a silicon oxide film is formed by a film forming method such as high density plasma (HDP) process so as to be buried in the trench. However, with progress of refinement of elements, void easily tends to occur in a narrow part of a region in which the silicon oxide film is buried.
The following countermeasure has been proposed to prevent occurrence of void. In burying the silicon oxide film in a trench, forming of the silicon oxide film is stopped before an upper opening of void occurring in a mid stage of the burying is closed by further execution of the burying. A polysilazane liquid is spin-coated so as to fill the void through the upper opening. A thermal treatment can be carried out after spin coating so that the polysilazane liquid is changed into a silicon oxide film. As a result, even when void occurs, the void is filled with the silicon oxide film such that an insulating film with high quality can be formed.
However, the silicon oxide film made from the aforesaid polysilazane liquid is generally difficult to treat in subsequent fabricating steps and accordingly has a difficulty in use with respect to process capability. For example, the silicon oxide film made from the polysilazane liquid has a higher etching rate than thermally-oxidized films in a wet process, whereupon the controllability of the silicon oxide film is difficult to increase.